-- Copyright (C) 1991-2013 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- VENDOR "Altera"
-- PROGRAM "Quartus II 64-Bit"
-- VERSION "Version 13.1.0 Build 162 10/23/2013 SJ Full Version"

-- DATE "10/17/2021 15:43:04"

-- 
-- Device: Altera EP3C16F484C6 Package FBGA484
-- 

-- 
-- This VHDL file should be used for ModelSim-Altera (VHDL) only
-- 

LIBRARY ALTERA;
LIBRARY CYCLONEIII;
LIBRARY IEEE;
USE ALTERA.ALTERA_PRIMITIVES_COMPONENTS.ALL;
USE CYCLONEIII.CYCLONEIII_COMPONENTS.ALL;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY 	PWM_TOP IS
    PORT (
	i_sys_clk : IN std_logic;
	i_sys_rst : IN std_logic;
	i_compare_set_value : IN std_logic_vector(6 DOWNTO 0);
	o_compare_result : OUT std_logic
	);
END PWM_TOP;

-- Design Ports Information
-- o_compare_result	=>  Location: PIN_F2,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- i_compare_set_value[6]	=>  Location: PIN_H7,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- i_compare_set_value[5]	=>  Location: PIN_J7,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- i_compare_set_value[4]	=>  Location: PIN_G5,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- i_compare_set_value[3]	=>  Location: PIN_G4,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- i_compare_set_value[2]	=>  Location: PIN_H6,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- i_compare_set_value[1]	=>  Location: PIN_H5,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- i_compare_set_value[0]	=>  Location: PIN_J6,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- i_sys_rst	=>  Location: PIN_G3,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- i_sys_clk	=>  Location: PIN_G21,	 I/O Standard: 2.5 V,	 Current Strength: Default


ARCHITECTURE structure OF PWM_TOP IS
SIGNAL gnd : std_logic := '0';
SIGNAL vcc : std_logic := '1';
SIGNAL unknown : std_logic := 'X';
SIGNAL devoe : std_logic := '1';
SIGNAL devclrn : std_logic := '1';
SIGNAL devpor : std_logic := '1';
SIGNAL ww_devoe : std_logic;
SIGNAL ww_devclrn : std_logic;
SIGNAL ww_devpor : std_logic;
SIGNAL ww_i_sys_clk : std_logic;
SIGNAL ww_i_sys_rst : std_logic;
SIGNAL ww_i_compare_set_value : std_logic_vector(6 DOWNTO 0);
SIGNAL ww_o_compare_result : std_logic;
SIGNAL \U1|r_div_clk~clkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \i_sys_clk~inputclkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \o_compare_result~output_o\ : std_logic;
SIGNAL \i_compare_set_value[6]~input_o\ : std_logic;
SIGNAL \i_sys_clk~input_o\ : std_logic;
SIGNAL \i_sys_clk~inputclkctrl_outclk\ : std_logic;
SIGNAL \U1|Add0~0_combout\ : std_logic;
SIGNAL \i_sys_rst~input_o\ : std_logic;
SIGNAL \U1|Add0~1\ : std_logic;
SIGNAL \U1|Add0~2_combout\ : std_logic;
SIGNAL \U1|r_div_count~5_combout\ : std_logic;
SIGNAL \U1|Add0~3\ : std_logic;
SIGNAL \U1|Add0~4_combout\ : std_logic;
SIGNAL \U1|Add0~5\ : std_logic;
SIGNAL \U1|Add0~6_combout\ : std_logic;
SIGNAL \U1|r_div_count~4_combout\ : std_logic;
SIGNAL \U1|Add0~7\ : std_logic;
SIGNAL \U1|Add0~8_combout\ : std_logic;
SIGNAL \U1|r_div_count~3_combout\ : std_logic;
SIGNAL \U1|Add0~9\ : std_logic;
SIGNAL \U1|Add0~10_combout\ : std_logic;
SIGNAL \U1|r_div_count~2_combout\ : std_logic;
SIGNAL \U1|Add0~11\ : std_logic;
SIGNAL \U1|Add0~12_combout\ : std_logic;
SIGNAL \U1|r_div_count~1_combout\ : std_logic;
SIGNAL \U1|Add0~13\ : std_logic;
SIGNAL \U1|Add0~14_combout\ : std_logic;
SIGNAL \U1|r_div_count~0_combout\ : std_logic;
SIGNAL \U1|Equal0~8_combout\ : std_logic;
SIGNAL \U1|Equal0~9_combout\ : std_logic;
SIGNAL \U1|Add0~15\ : std_logic;
SIGNAL \U1|Add0~16_combout\ : std_logic;
SIGNAL \U1|Add0~17\ : std_logic;
SIGNAL \U1|Add0~18_combout\ : std_logic;
SIGNAL \U1|Add0~19\ : std_logic;
SIGNAL \U1|Add0~20_combout\ : std_logic;
SIGNAL \U1|Add0~21\ : std_logic;
SIGNAL \U1|Add0~22_combout\ : std_logic;
SIGNAL \U1|Equal0~6_combout\ : std_logic;
SIGNAL \U1|Add0~23\ : std_logic;
SIGNAL \U1|Add0~24_combout\ : std_logic;
SIGNAL \U1|Add0~25\ : std_logic;
SIGNAL \U1|Add0~26_combout\ : std_logic;
SIGNAL \U1|Add0~27\ : std_logic;
SIGNAL \U1|Add0~28_combout\ : std_logic;
SIGNAL \U1|Add0~29\ : std_logic;
SIGNAL \U1|Add0~30_combout\ : std_logic;
SIGNAL \U1|Equal0~5_combout\ : std_logic;
SIGNAL \U1|Equal0~7_combout\ : std_logic;
SIGNAL \U1|Add0~31\ : std_logic;
SIGNAL \U1|Add0~32_combout\ : std_logic;
SIGNAL \U1|Add0~33\ : std_logic;
SIGNAL \U1|Add0~34_combout\ : std_logic;
SIGNAL \U1|Add0~35\ : std_logic;
SIGNAL \U1|Add0~36_combout\ : std_logic;
SIGNAL \U1|Add0~37\ : std_logic;
SIGNAL \U1|Add0~38_combout\ : std_logic;
SIGNAL \U1|Add0~39\ : std_logic;
SIGNAL \U1|Add0~40_combout\ : std_logic;
SIGNAL \U1|Add0~41\ : std_logic;
SIGNAL \U1|Add0~42_combout\ : std_logic;
SIGNAL \U1|Add0~43\ : std_logic;
SIGNAL \U1|Add0~44_combout\ : std_logic;
SIGNAL \U1|Add0~45\ : std_logic;
SIGNAL \U1|Add0~46_combout\ : std_logic;
SIGNAL \U1|Add0~47\ : std_logic;
SIGNAL \U1|Add0~48_combout\ : std_logic;
SIGNAL \U1|Add0~49\ : std_logic;
SIGNAL \U1|Add0~50_combout\ : std_logic;
SIGNAL \U1|Add0~51\ : std_logic;
SIGNAL \U1|Add0~52_combout\ : std_logic;
SIGNAL \U1|Add0~53\ : std_logic;
SIGNAL \U1|Add0~54_combout\ : std_logic;
SIGNAL \U1|Add0~55\ : std_logic;
SIGNAL \U1|Add0~56_combout\ : std_logic;
SIGNAL \U1|Add0~57\ : std_logic;
SIGNAL \U1|Add0~58_combout\ : std_logic;
SIGNAL \U1|Add0~59\ : std_logic;
SIGNAL \U1|Add0~60_combout\ : std_logic;
SIGNAL \U1|Add0~61\ : std_logic;
SIGNAL \U1|Add0~62_combout\ : std_logic;
SIGNAL \U1|Equal0~0_combout\ : std_logic;
SIGNAL \U1|Equal0~2_combout\ : std_logic;
SIGNAL \U1|Equal0~3_combout\ : std_logic;
SIGNAL \U1|Equal0~1_combout\ : std_logic;
SIGNAL \U1|Equal0~4_combout\ : std_logic;
SIGNAL \U1|Equal0~10_combout\ : std_logic;
SIGNAL \U1|r_div_clk~0_combout\ : std_logic;
SIGNAL \U1|r_div_clk~feeder_combout\ : std_logic;
SIGNAL \U1|r_div_clk~q\ : std_logic;
SIGNAL \U1|r_div_clk~clkctrl_outclk\ : std_logic;
SIGNAL \U2|Add0~0_combout\ : std_logic;
SIGNAL \U2|Add0~1\ : std_logic;
SIGNAL \U2|Add0~2_combout\ : std_logic;
SIGNAL \U2|Add0~3\ : std_logic;
SIGNAL \U2|Add0~5\ : std_logic;
SIGNAL \U2|Add0~6_combout\ : std_logic;
SIGNAL \U2|Add0~7\ : std_logic;
SIGNAL \U2|Add0~8_combout\ : std_logic;
SIGNAL \U2|Add0~9\ : std_logic;
SIGNAL \U2|Add0~10_combout\ : std_logic;
SIGNAL \U2|r_pwm_val~1_combout\ : std_logic;
SIGNAL \U2|Equal0~0_combout\ : std_logic;
SIGNAL \U2|Add0~4_combout\ : std_logic;
SIGNAL \U2|r_pwm_val~2_combout\ : std_logic;
SIGNAL \U2|Equal0~1_combout\ : std_logic;
SIGNAL \U2|Add0~11\ : std_logic;
SIGNAL \U2|Add0~12_combout\ : std_logic;
SIGNAL \U2|r_pwm_val~0_combout\ : std_logic;
SIGNAL \i_compare_set_value[5]~input_o\ : std_logic;
SIGNAL \i_compare_set_value[4]~input_o\ : std_logic;
SIGNAL \i_compare_set_value[3]~input_o\ : std_logic;
SIGNAL \i_compare_set_value[2]~input_o\ : std_logic;
SIGNAL \i_compare_set_value[1]~input_o\ : std_logic;
SIGNAL \i_compare_set_value[0]~input_o\ : std_logic;
SIGNAL \U3|LessThan0~1_cout\ : std_logic;
SIGNAL \U3|LessThan0~3_cout\ : std_logic;
SIGNAL \U3|LessThan0~5_cout\ : std_logic;
SIGNAL \U3|LessThan0~7_cout\ : std_logic;
SIGNAL \U3|LessThan0~9_cout\ : std_logic;
SIGNAL \U3|LessThan0~11_cout\ : std_logic;
SIGNAL \U3|LessThan0~12_combout\ : std_logic;
SIGNAL \U1|r_div_count\ : std_logic_vector(31 DOWNTO 0);
SIGNAL \U2|r_pwm_val\ : std_logic_vector(6 DOWNTO 0);

BEGIN

ww_i_sys_clk <= i_sys_clk;
ww_i_sys_rst <= i_sys_rst;
ww_i_compare_set_value <= i_compare_set_value;
o_compare_result <= ww_o_compare_result;
ww_devoe <= devoe;
ww_devclrn <= devclrn;
ww_devpor <= devpor;

\U1|r_div_clk~clkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \U1|r_div_clk~q\);

\i_sys_clk~inputclkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \i_sys_clk~input_o\);

-- Location: IOOBUF_X0_Y24_N23
\o_compare_result~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \U3|LessThan0~12_combout\,
	devoe => ww_devoe,
	o => \o_compare_result~output_o\);

-- Location: IOIBUF_X0_Y25_N15
\i_compare_set_value[6]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_i_compare_set_value(6),
	o => \i_compare_set_value[6]~input_o\);

-- Location: IOIBUF_X41_Y15_N1
\i_sys_clk~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_i_sys_clk,
	o => \i_sys_clk~input_o\);

-- Location: CLKCTRL_G9
\i_sys_clk~inputclkctrl\ : cycloneiii_clkctrl
-- pragma translate_off
GENERIC MAP (
	clock_type => "global clock",
	ena_register_mode => "none")
-- pragma translate_on
PORT MAP (
	inclk => \i_sys_clk~inputclkctrl_INCLK_bus\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	outclk => \i_sys_clk~inputclkctrl_outclk\);

-- Location: LCCOMB_X11_Y19_N0
\U1|Add0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~0_combout\ = \U1|r_div_count\(0) $ (VCC)
-- \U1|Add0~1\ = CARRY(\U1|r_div_count\(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001111001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(0),
	datad => VCC,
	combout => \U1|Add0~0_combout\,
	cout => \U1|Add0~1\);

-- Location: IOIBUF_X0_Y23_N15
\i_sys_rst~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_i_sys_rst,
	o => \i_sys_rst~input_o\);

-- Location: FF_X11_Y19_N1
\U1|r_div_count[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~0_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(0));

-- Location: LCCOMB_X11_Y19_N2
\U1|Add0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~2_combout\ = (\U1|r_div_count\(1) & (!\U1|Add0~1\)) # (!\U1|r_div_count\(1) & ((\U1|Add0~1\) # (GND)))
-- \U1|Add0~3\ = CARRY((!\U1|Add0~1\) # (!\U1|r_div_count\(1)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(1),
	datad => VCC,
	cin => \U1|Add0~1\,
	combout => \U1|Add0~2_combout\,
	cout => \U1|Add0~3\);

-- Location: LCCOMB_X10_Y19_N6
\U1|r_div_count~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|r_div_count~5_combout\ = (!\U1|Equal0~10_combout\ & \U1|Add0~2_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \U1|Equal0~10_combout\,
	datad => \U1|Add0~2_combout\,
	combout => \U1|r_div_count~5_combout\);

-- Location: FF_X10_Y19_N7
\U1|r_div_count[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|r_div_count~5_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(1));

-- Location: LCCOMB_X11_Y19_N4
\U1|Add0~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~4_combout\ = (\U1|r_div_count\(2) & (\U1|Add0~3\ $ (GND))) # (!\U1|r_div_count\(2) & (!\U1|Add0~3\ & VCC))
-- \U1|Add0~5\ = CARRY((\U1|r_div_count\(2) & !\U1|Add0~3\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(2),
	datad => VCC,
	cin => \U1|Add0~3\,
	combout => \U1|Add0~4_combout\,
	cout => \U1|Add0~5\);

-- Location: FF_X11_Y19_N5
\U1|r_div_count[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~4_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(2));

-- Location: LCCOMB_X11_Y19_N6
\U1|Add0~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~6_combout\ = (\U1|r_div_count\(3) & (!\U1|Add0~5\)) # (!\U1|r_div_count\(3) & ((\U1|Add0~5\) # (GND)))
-- \U1|Add0~7\ = CARRY((!\U1|Add0~5\) # (!\U1|r_div_count\(3)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(3),
	datad => VCC,
	cin => \U1|Add0~5\,
	combout => \U1|Add0~6_combout\,
	cout => \U1|Add0~7\);

-- Location: LCCOMB_X10_Y19_N16
\U1|r_div_count~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|r_div_count~4_combout\ = (!\U1|Equal0~10_combout\ & \U1|Add0~6_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \U1|Equal0~10_combout\,
	datad => \U1|Add0~6_combout\,
	combout => \U1|r_div_count~4_combout\);

-- Location: FF_X10_Y19_N17
\U1|r_div_count[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|r_div_count~4_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(3));

-- Location: LCCOMB_X11_Y19_N8
\U1|Add0~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~8_combout\ = (\U1|r_div_count\(4) & (\U1|Add0~7\ $ (GND))) # (!\U1|r_div_count\(4) & (!\U1|Add0~7\ & VCC))
-- \U1|Add0~9\ = CARRY((\U1|r_div_count\(4) & !\U1|Add0~7\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(4),
	datad => VCC,
	cin => \U1|Add0~7\,
	combout => \U1|Add0~8_combout\,
	cout => \U1|Add0~9\);

-- Location: LCCOMB_X10_Y19_N8
\U1|r_div_count~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|r_div_count~3_combout\ = (\U1|Add0~8_combout\ & !\U1|Equal0~10_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \U1|Add0~8_combout\,
	datad => \U1|Equal0~10_combout\,
	combout => \U1|r_div_count~3_combout\);

-- Location: FF_X10_Y19_N9
\U1|r_div_count[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|r_div_count~3_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(4));

-- Location: LCCOMB_X11_Y19_N10
\U1|Add0~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~10_combout\ = (\U1|r_div_count\(5) & (!\U1|Add0~9\)) # (!\U1|r_div_count\(5) & ((\U1|Add0~9\) # (GND)))
-- \U1|Add0~11\ = CARRY((!\U1|Add0~9\) # (!\U1|r_div_count\(5)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(5),
	datad => VCC,
	cin => \U1|Add0~9\,
	combout => \U1|Add0~10_combout\,
	cout => \U1|Add0~11\);

-- Location: LCCOMB_X10_Y19_N14
\U1|r_div_count~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|r_div_count~2_combout\ = (\U1|Add0~10_combout\ & !\U1|Equal0~10_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \U1|Add0~10_combout\,
	datad => \U1|Equal0~10_combout\,
	combout => \U1|r_div_count~2_combout\);

-- Location: FF_X10_Y19_N15
\U1|r_div_count[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|r_div_count~2_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(5));

-- Location: LCCOMB_X11_Y19_N12
\U1|Add0~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~12_combout\ = (\U1|r_div_count\(6) & (\U1|Add0~11\ $ (GND))) # (!\U1|r_div_count\(6) & (!\U1|Add0~11\ & VCC))
-- \U1|Add0~13\ = CARRY((\U1|r_div_count\(6) & !\U1|Add0~11\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(6),
	datad => VCC,
	cin => \U1|Add0~11\,
	combout => \U1|Add0~12_combout\,
	cout => \U1|Add0~13\);

-- Location: LCCOMB_X10_Y19_N10
\U1|r_div_count~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|r_div_count~1_combout\ = (\U1|Add0~12_combout\ & !\U1|Equal0~10_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \U1|Add0~12_combout\,
	datad => \U1|Equal0~10_combout\,
	combout => \U1|r_div_count~1_combout\);

-- Location: FF_X10_Y19_N11
\U1|r_div_count[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|r_div_count~1_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(6));

-- Location: LCCOMB_X11_Y19_N14
\U1|Add0~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~14_combout\ = (\U1|r_div_count\(7) & (!\U1|Add0~13\)) # (!\U1|r_div_count\(7) & ((\U1|Add0~13\) # (GND)))
-- \U1|Add0~15\ = CARRY((!\U1|Add0~13\) # (!\U1|r_div_count\(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(7),
	datad => VCC,
	cin => \U1|Add0~13\,
	combout => \U1|Add0~14_combout\,
	cout => \U1|Add0~15\);

-- Location: LCCOMB_X10_Y19_N12
\U1|r_div_count~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|r_div_count~0_combout\ = (\U1|Add0~14_combout\ & !\U1|Equal0~10_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \U1|Add0~14_combout\,
	datad => \U1|Equal0~10_combout\,
	combout => \U1|r_div_count~0_combout\);

-- Location: FF_X10_Y19_N13
\U1|r_div_count[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|r_div_count~0_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(7));

-- Location: LCCOMB_X10_Y19_N22
\U1|Equal0~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Equal0~8_combout\ = (\U1|r_div_count\(6) & (\U1|r_div_count\(4) & (\U1|r_div_count\(5) & \U1|r_div_count\(7))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(6),
	datab => \U1|r_div_count\(4),
	datac => \U1|r_div_count\(5),
	datad => \U1|r_div_count\(7),
	combout => \U1|Equal0~8_combout\);

-- Location: LCCOMB_X10_Y19_N4
\U1|Equal0~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Equal0~9_combout\ = (!\U1|r_div_count\(1) & (\U1|r_div_count\(3) & (\U1|r_div_count\(0) & !\U1|r_div_count\(2))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(1),
	datab => \U1|r_div_count\(3),
	datac => \U1|r_div_count\(0),
	datad => \U1|r_div_count\(2),
	combout => \U1|Equal0~9_combout\);

-- Location: LCCOMB_X11_Y19_N16
\U1|Add0~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~16_combout\ = (\U1|r_div_count\(8) & (\U1|Add0~15\ $ (GND))) # (!\U1|r_div_count\(8) & (!\U1|Add0~15\ & VCC))
-- \U1|Add0~17\ = CARRY((\U1|r_div_count\(8) & !\U1|Add0~15\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(8),
	datad => VCC,
	cin => \U1|Add0~15\,
	combout => \U1|Add0~16_combout\,
	cout => \U1|Add0~17\);

-- Location: FF_X11_Y19_N17
\U1|r_div_count[8]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~16_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(8));

-- Location: LCCOMB_X11_Y19_N18
\U1|Add0~18\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~18_combout\ = (\U1|r_div_count\(9) & (!\U1|Add0~17\)) # (!\U1|r_div_count\(9) & ((\U1|Add0~17\) # (GND)))
-- \U1|Add0~19\ = CARRY((!\U1|Add0~17\) # (!\U1|r_div_count\(9)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(9),
	datad => VCC,
	cin => \U1|Add0~17\,
	combout => \U1|Add0~18_combout\,
	cout => \U1|Add0~19\);

-- Location: FF_X11_Y19_N19
\U1|r_div_count[9]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~18_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(9));

-- Location: LCCOMB_X11_Y19_N20
\U1|Add0~20\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~20_combout\ = (\U1|r_div_count\(10) & (\U1|Add0~19\ $ (GND))) # (!\U1|r_div_count\(10) & (!\U1|Add0~19\ & VCC))
-- \U1|Add0~21\ = CARRY((\U1|r_div_count\(10) & !\U1|Add0~19\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(10),
	datad => VCC,
	cin => \U1|Add0~19\,
	combout => \U1|Add0~20_combout\,
	cout => \U1|Add0~21\);

-- Location: FF_X11_Y19_N21
\U1|r_div_count[10]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~20_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(10));

-- Location: LCCOMB_X11_Y19_N22
\U1|Add0~22\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~22_combout\ = (\U1|r_div_count\(11) & (!\U1|Add0~21\)) # (!\U1|r_div_count\(11) & ((\U1|Add0~21\) # (GND)))
-- \U1|Add0~23\ = CARRY((!\U1|Add0~21\) # (!\U1|r_div_count\(11)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(11),
	datad => VCC,
	cin => \U1|Add0~21\,
	combout => \U1|Add0~22_combout\,
	cout => \U1|Add0~23\);

-- Location: FF_X11_Y19_N23
\U1|r_div_count[11]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~22_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(11));

-- Location: LCCOMB_X10_Y19_N30
\U1|Equal0~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Equal0~6_combout\ = (!\U1|r_div_count\(10) & !\U1|r_div_count\(11))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000001111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \U1|r_div_count\(10),
	datad => \U1|r_div_count\(11),
	combout => \U1|Equal0~6_combout\);

-- Location: LCCOMB_X11_Y19_N24
\U1|Add0~24\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~24_combout\ = (\U1|r_div_count\(12) & (\U1|Add0~23\ $ (GND))) # (!\U1|r_div_count\(12) & (!\U1|Add0~23\ & VCC))
-- \U1|Add0~25\ = CARRY((\U1|r_div_count\(12) & !\U1|Add0~23\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(12),
	datad => VCC,
	cin => \U1|Add0~23\,
	combout => \U1|Add0~24_combout\,
	cout => \U1|Add0~25\);

-- Location: FF_X11_Y19_N25
\U1|r_div_count[12]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~24_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(12));

-- Location: LCCOMB_X11_Y19_N26
\U1|Add0~26\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~26_combout\ = (\U1|r_div_count\(13) & (!\U1|Add0~25\)) # (!\U1|r_div_count\(13) & ((\U1|Add0~25\) # (GND)))
-- \U1|Add0~27\ = CARRY((!\U1|Add0~25\) # (!\U1|r_div_count\(13)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(13),
	datad => VCC,
	cin => \U1|Add0~25\,
	combout => \U1|Add0~26_combout\,
	cout => \U1|Add0~27\);

-- Location: FF_X11_Y19_N27
\U1|r_div_count[13]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~26_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(13));

-- Location: LCCOMB_X11_Y19_N28
\U1|Add0~28\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~28_combout\ = (\U1|r_div_count\(14) & (\U1|Add0~27\ $ (GND))) # (!\U1|r_div_count\(14) & (!\U1|Add0~27\ & VCC))
-- \U1|Add0~29\ = CARRY((\U1|r_div_count\(14) & !\U1|Add0~27\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(14),
	datad => VCC,
	cin => \U1|Add0~27\,
	combout => \U1|Add0~28_combout\,
	cout => \U1|Add0~29\);

-- Location: FF_X11_Y19_N29
\U1|r_div_count[14]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~28_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(14));

-- Location: LCCOMB_X11_Y19_N30
\U1|Add0~30\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~30_combout\ = (\U1|r_div_count\(15) & (!\U1|Add0~29\)) # (!\U1|r_div_count\(15) & ((\U1|Add0~29\) # (GND)))
-- \U1|Add0~31\ = CARRY((!\U1|Add0~29\) # (!\U1|r_div_count\(15)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(15),
	datad => VCC,
	cin => \U1|Add0~29\,
	combout => \U1|Add0~30_combout\,
	cout => \U1|Add0~31\);

-- Location: FF_X11_Y19_N31
\U1|r_div_count[15]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~30_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(15));

-- Location: LCCOMB_X10_Y19_N28
\U1|Equal0~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Equal0~5_combout\ = (!\U1|r_div_count\(15) & (!\U1|r_div_count\(14) & (!\U1|r_div_count\(12) & !\U1|r_div_count\(13))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000000001",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(15),
	datab => \U1|r_div_count\(14),
	datac => \U1|r_div_count\(12),
	datad => \U1|r_div_count\(13),
	combout => \U1|Equal0~5_combout\);

-- Location: LCCOMB_X10_Y19_N26
\U1|Equal0~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Equal0~7_combout\ = (!\U1|r_div_count\(8) & (!\U1|r_div_count\(9) & (\U1|Equal0~6_combout\ & \U1|Equal0~5_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0001000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(8),
	datab => \U1|r_div_count\(9),
	datac => \U1|Equal0~6_combout\,
	datad => \U1|Equal0~5_combout\,
	combout => \U1|Equal0~7_combout\);

-- Location: LCCOMB_X11_Y18_N0
\U1|Add0~32\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~32_combout\ = (\U1|r_div_count\(16) & (\U1|Add0~31\ $ (GND))) # (!\U1|r_div_count\(16) & (!\U1|Add0~31\ & VCC))
-- \U1|Add0~33\ = CARRY((\U1|r_div_count\(16) & !\U1|Add0~31\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(16),
	datad => VCC,
	cin => \U1|Add0~31\,
	combout => \U1|Add0~32_combout\,
	cout => \U1|Add0~33\);

-- Location: FF_X11_Y18_N1
\U1|r_div_count[16]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~32_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(16));

-- Location: LCCOMB_X11_Y18_N2
\U1|Add0~34\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~34_combout\ = (\U1|r_div_count\(17) & (!\U1|Add0~33\)) # (!\U1|r_div_count\(17) & ((\U1|Add0~33\) # (GND)))
-- \U1|Add0~35\ = CARRY((!\U1|Add0~33\) # (!\U1|r_div_count\(17)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(17),
	datad => VCC,
	cin => \U1|Add0~33\,
	combout => \U1|Add0~34_combout\,
	cout => \U1|Add0~35\);

-- Location: FF_X11_Y18_N3
\U1|r_div_count[17]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~34_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(17));

-- Location: LCCOMB_X11_Y18_N4
\U1|Add0~36\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~36_combout\ = (\U1|r_div_count\(18) & (\U1|Add0~35\ $ (GND))) # (!\U1|r_div_count\(18) & (!\U1|Add0~35\ & VCC))
-- \U1|Add0~37\ = CARRY((\U1|r_div_count\(18) & !\U1|Add0~35\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(18),
	datad => VCC,
	cin => \U1|Add0~35\,
	combout => \U1|Add0~36_combout\,
	cout => \U1|Add0~37\);

-- Location: FF_X11_Y18_N5
\U1|r_div_count[18]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~36_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(18));

-- Location: LCCOMB_X11_Y18_N6
\U1|Add0~38\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~38_combout\ = (\U1|r_div_count\(19) & (!\U1|Add0~37\)) # (!\U1|r_div_count\(19) & ((\U1|Add0~37\) # (GND)))
-- \U1|Add0~39\ = CARRY((!\U1|Add0~37\) # (!\U1|r_div_count\(19)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(19),
	datad => VCC,
	cin => \U1|Add0~37\,
	combout => \U1|Add0~38_combout\,
	cout => \U1|Add0~39\);

-- Location: FF_X11_Y18_N7
\U1|r_div_count[19]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~38_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(19));

-- Location: LCCOMB_X11_Y18_N8
\U1|Add0~40\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~40_combout\ = (\U1|r_div_count\(20) & (\U1|Add0~39\ $ (GND))) # (!\U1|r_div_count\(20) & (!\U1|Add0~39\ & VCC))
-- \U1|Add0~41\ = CARRY((\U1|r_div_count\(20) & !\U1|Add0~39\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(20),
	datad => VCC,
	cin => \U1|Add0~39\,
	combout => \U1|Add0~40_combout\,
	cout => \U1|Add0~41\);

-- Location: FF_X11_Y18_N9
\U1|r_div_count[20]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~40_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(20));

-- Location: LCCOMB_X11_Y18_N10
\U1|Add0~42\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~42_combout\ = (\U1|r_div_count\(21) & (!\U1|Add0~41\)) # (!\U1|r_div_count\(21) & ((\U1|Add0~41\) # (GND)))
-- \U1|Add0~43\ = CARRY((!\U1|Add0~41\) # (!\U1|r_div_count\(21)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(21),
	datad => VCC,
	cin => \U1|Add0~41\,
	combout => \U1|Add0~42_combout\,
	cout => \U1|Add0~43\);

-- Location: FF_X11_Y18_N11
\U1|r_div_count[21]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~42_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(21));

-- Location: LCCOMB_X11_Y18_N12
\U1|Add0~44\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~44_combout\ = (\U1|r_div_count\(22) & (\U1|Add0~43\ $ (GND))) # (!\U1|r_div_count\(22) & (!\U1|Add0~43\ & VCC))
-- \U1|Add0~45\ = CARRY((\U1|r_div_count\(22) & !\U1|Add0~43\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(22),
	datad => VCC,
	cin => \U1|Add0~43\,
	combout => \U1|Add0~44_combout\,
	cout => \U1|Add0~45\);

-- Location: FF_X11_Y18_N13
\U1|r_div_count[22]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~44_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(22));

-- Location: LCCOMB_X11_Y18_N14
\U1|Add0~46\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~46_combout\ = (\U1|r_div_count\(23) & (!\U1|Add0~45\)) # (!\U1|r_div_count\(23) & ((\U1|Add0~45\) # (GND)))
-- \U1|Add0~47\ = CARRY((!\U1|Add0~45\) # (!\U1|r_div_count\(23)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(23),
	datad => VCC,
	cin => \U1|Add0~45\,
	combout => \U1|Add0~46_combout\,
	cout => \U1|Add0~47\);

-- Location: FF_X11_Y18_N15
\U1|r_div_count[23]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~46_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(23));

-- Location: LCCOMB_X11_Y18_N16
\U1|Add0~48\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~48_combout\ = (\U1|r_div_count\(24) & (\U1|Add0~47\ $ (GND))) # (!\U1|r_div_count\(24) & (!\U1|Add0~47\ & VCC))
-- \U1|Add0~49\ = CARRY((\U1|r_div_count\(24) & !\U1|Add0~47\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(24),
	datad => VCC,
	cin => \U1|Add0~47\,
	combout => \U1|Add0~48_combout\,
	cout => \U1|Add0~49\);

-- Location: FF_X11_Y18_N17
\U1|r_div_count[24]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~48_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(24));

-- Location: LCCOMB_X11_Y18_N18
\U1|Add0~50\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~50_combout\ = (\U1|r_div_count\(25) & (!\U1|Add0~49\)) # (!\U1|r_div_count\(25) & ((\U1|Add0~49\) # (GND)))
-- \U1|Add0~51\ = CARRY((!\U1|Add0~49\) # (!\U1|r_div_count\(25)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(25),
	datad => VCC,
	cin => \U1|Add0~49\,
	combout => \U1|Add0~50_combout\,
	cout => \U1|Add0~51\);

-- Location: FF_X11_Y18_N19
\U1|r_div_count[25]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~50_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(25));

-- Location: LCCOMB_X11_Y18_N20
\U1|Add0~52\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~52_combout\ = (\U1|r_div_count\(26) & (\U1|Add0~51\ $ (GND))) # (!\U1|r_div_count\(26) & (!\U1|Add0~51\ & VCC))
-- \U1|Add0~53\ = CARRY((\U1|r_div_count\(26) & !\U1|Add0~51\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(26),
	datad => VCC,
	cin => \U1|Add0~51\,
	combout => \U1|Add0~52_combout\,
	cout => \U1|Add0~53\);

-- Location: FF_X11_Y18_N21
\U1|r_div_count[26]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~52_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(26));

-- Location: LCCOMB_X11_Y18_N22
\U1|Add0~54\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~54_combout\ = (\U1|r_div_count\(27) & (!\U1|Add0~53\)) # (!\U1|r_div_count\(27) & ((\U1|Add0~53\) # (GND)))
-- \U1|Add0~55\ = CARRY((!\U1|Add0~53\) # (!\U1|r_div_count\(27)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(27),
	datad => VCC,
	cin => \U1|Add0~53\,
	combout => \U1|Add0~54_combout\,
	cout => \U1|Add0~55\);

-- Location: FF_X11_Y18_N23
\U1|r_div_count[27]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~54_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(27));

-- Location: LCCOMB_X11_Y18_N24
\U1|Add0~56\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~56_combout\ = (\U1|r_div_count\(28) & (\U1|Add0~55\ $ (GND))) # (!\U1|r_div_count\(28) & (!\U1|Add0~55\ & VCC))
-- \U1|Add0~57\ = CARRY((\U1|r_div_count\(28) & !\U1|Add0~55\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(28),
	datad => VCC,
	cin => \U1|Add0~55\,
	combout => \U1|Add0~56_combout\,
	cout => \U1|Add0~57\);

-- Location: FF_X11_Y18_N25
\U1|r_div_count[28]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~56_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(28));

-- Location: LCCOMB_X11_Y18_N26
\U1|Add0~58\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~58_combout\ = (\U1|r_div_count\(29) & (!\U1|Add0~57\)) # (!\U1|r_div_count\(29) & ((\U1|Add0~57\) # (GND)))
-- \U1|Add0~59\ = CARRY((!\U1|Add0~57\) # (!\U1|r_div_count\(29)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(29),
	datad => VCC,
	cin => \U1|Add0~57\,
	combout => \U1|Add0~58_combout\,
	cout => \U1|Add0~59\);

-- Location: FF_X11_Y18_N27
\U1|r_div_count[29]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~58_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(29));

-- Location: LCCOMB_X11_Y18_N28
\U1|Add0~60\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~60_combout\ = (\U1|r_div_count\(30) & (\U1|Add0~59\ $ (GND))) # (!\U1|r_div_count\(30) & (!\U1|Add0~59\ & VCC))
-- \U1|Add0~61\ = CARRY((\U1|r_div_count\(30) & !\U1|Add0~59\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_count\(30),
	datad => VCC,
	cin => \U1|Add0~59\,
	combout => \U1|Add0~60_combout\,
	cout => \U1|Add0~61\);

-- Location: FF_X11_Y18_N29
\U1|r_div_count[30]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~60_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(30));

-- Location: LCCOMB_X11_Y18_N30
\U1|Add0~62\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Add0~62_combout\ = \U1|r_div_count\(31) $ (\U1|Add0~61\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(31),
	cin => \U1|Add0~61\,
	combout => \U1|Add0~62_combout\);

-- Location: FF_X11_Y18_N31
\U1|r_div_count[31]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|Add0~62_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_count\(31));

-- Location: LCCOMB_X10_Y18_N12
\U1|Equal0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Equal0~0_combout\ = (!\U1|r_div_count\(31) & (!\U1|r_div_count\(29) & (!\U1|r_div_count\(28) & !\U1|r_div_count\(30))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000000001",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(31),
	datab => \U1|r_div_count\(29),
	datac => \U1|r_div_count\(28),
	datad => \U1|r_div_count\(30),
	combout => \U1|Equal0~0_combout\);

-- Location: LCCOMB_X10_Y18_N4
\U1|Equal0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Equal0~2_combout\ = (!\U1|r_div_count\(23) & (!\U1|r_div_count\(22) & (!\U1|r_div_count\(21) & !\U1|r_div_count\(20))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000000001",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(23),
	datab => \U1|r_div_count\(22),
	datac => \U1|r_div_count\(21),
	datad => \U1|r_div_count\(20),
	combout => \U1|Equal0~2_combout\);

-- Location: LCCOMB_X10_Y18_N22
\U1|Equal0~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Equal0~3_combout\ = (!\U1|r_div_count\(19) & (!\U1|r_div_count\(16) & (!\U1|r_div_count\(18) & !\U1|r_div_count\(17))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000000001",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(19),
	datab => \U1|r_div_count\(16),
	datac => \U1|r_div_count\(18),
	datad => \U1|r_div_count\(17),
	combout => \U1|Equal0~3_combout\);

-- Location: LCCOMB_X10_Y18_N2
\U1|Equal0~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Equal0~1_combout\ = (!\U1|r_div_count\(26) & (!\U1|r_div_count\(27) & (!\U1|r_div_count\(25) & !\U1|r_div_count\(24))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000000001",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_count\(26),
	datab => \U1|r_div_count\(27),
	datac => \U1|r_div_count\(25),
	datad => \U1|r_div_count\(24),
	combout => \U1|Equal0~1_combout\);

-- Location: LCCOMB_X10_Y18_N0
\U1|Equal0~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Equal0~4_combout\ = (\U1|Equal0~0_combout\ & (\U1|Equal0~2_combout\ & (\U1|Equal0~3_combout\ & \U1|Equal0~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U1|Equal0~0_combout\,
	datab => \U1|Equal0~2_combout\,
	datac => \U1|Equal0~3_combout\,
	datad => \U1|Equal0~1_combout\,
	combout => \U1|Equal0~4_combout\);

-- Location: LCCOMB_X10_Y19_N24
\U1|Equal0~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|Equal0~10_combout\ = (\U1|Equal0~8_combout\ & (\U1|Equal0~9_combout\ & (\U1|Equal0~7_combout\ & \U1|Equal0~4_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U1|Equal0~8_combout\,
	datab => \U1|Equal0~9_combout\,
	datac => \U1|Equal0~7_combout\,
	datad => \U1|Equal0~4_combout\,
	combout => \U1|Equal0~10_combout\);

-- Location: LCCOMB_X10_Y19_N20
\U1|r_div_clk~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|r_div_clk~0_combout\ = \U1|r_div_clk~q\ $ (\U1|Equal0~10_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001111001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \U1|r_div_clk~q\,
	datad => \U1|Equal0~10_combout\,
	combout => \U1|r_div_clk~0_combout\);

-- Location: LCCOMB_X10_Y19_N0
\U1|r_div_clk~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U1|r_div_clk~feeder_combout\ = \U1|r_div_clk~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U1|r_div_clk~0_combout\,
	combout => \U1|r_div_clk~feeder_combout\);

-- Location: FF_X10_Y19_N1
\U1|r_div_clk\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \i_sys_clk~inputclkctrl_outclk\,
	d => \U1|r_div_clk~feeder_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U1|r_div_clk~q\);

-- Location: CLKCTRL_G4
\U1|r_div_clk~clkctrl\ : cycloneiii_clkctrl
-- pragma translate_off
GENERIC MAP (
	clock_type => "global clock",
	ena_register_mode => "none")
-- pragma translate_on
PORT MAP (
	inclk => \U1|r_div_clk~clkctrl_INCLK_bus\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	outclk => \U1|r_div_clk~clkctrl_outclk\);

-- Location: LCCOMB_X2_Y25_N12
\U2|Add0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U2|Add0~0_combout\ = \U2|r_pwm_val\(0) $ (VCC)
-- \U2|Add0~1\ = CARRY(\U2|r_pwm_val\(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101010110101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U2|r_pwm_val\(0),
	datad => VCC,
	combout => \U2|Add0~0_combout\,
	cout => \U2|Add0~1\);

-- Location: FF_X2_Y25_N13
\U2|r_pwm_val[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \U1|r_div_clk~clkctrl_outclk\,
	d => \U2|Add0~0_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U2|r_pwm_val\(0));

-- Location: LCCOMB_X2_Y25_N14
\U2|Add0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U2|Add0~2_combout\ = (\U2|r_pwm_val\(1) & (!\U2|Add0~1\)) # (!\U2|r_pwm_val\(1) & ((\U2|Add0~1\) # (GND)))
-- \U2|Add0~3\ = CARRY((!\U2|Add0~1\) # (!\U2|r_pwm_val\(1)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U2|r_pwm_val\(1),
	datad => VCC,
	cin => \U2|Add0~1\,
	combout => \U2|Add0~2_combout\,
	cout => \U2|Add0~3\);

-- Location: FF_X2_Y25_N15
\U2|r_pwm_val[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \U1|r_div_clk~clkctrl_outclk\,
	d => \U2|Add0~2_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U2|r_pwm_val\(1));

-- Location: LCCOMB_X2_Y25_N16
\U2|Add0~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U2|Add0~4_combout\ = (\U2|r_pwm_val\(2) & (\U2|Add0~3\ $ (GND))) # (!\U2|r_pwm_val\(2) & (!\U2|Add0~3\ & VCC))
-- \U2|Add0~5\ = CARRY((\U2|r_pwm_val\(2) & !\U2|Add0~3\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U2|r_pwm_val\(2),
	datad => VCC,
	cin => \U2|Add0~3\,
	combout => \U2|Add0~4_combout\,
	cout => \U2|Add0~5\);

-- Location: LCCOMB_X2_Y25_N18
\U2|Add0~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U2|Add0~6_combout\ = (\U2|r_pwm_val\(3) & (!\U2|Add0~5\)) # (!\U2|r_pwm_val\(3) & ((\U2|Add0~5\) # (GND)))
-- \U2|Add0~7\ = CARRY((!\U2|Add0~5\) # (!\U2|r_pwm_val\(3)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U2|r_pwm_val\(3),
	datad => VCC,
	cin => \U2|Add0~5\,
	combout => \U2|Add0~6_combout\,
	cout => \U2|Add0~7\);

-- Location: FF_X2_Y25_N19
\U2|r_pwm_val[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \U1|r_div_clk~clkctrl_outclk\,
	d => \U2|Add0~6_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U2|r_pwm_val\(3));

-- Location: LCCOMB_X2_Y25_N20
\U2|Add0~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U2|Add0~8_combout\ = (\U2|r_pwm_val\(4) & (\U2|Add0~7\ $ (GND))) # (!\U2|r_pwm_val\(4) & (!\U2|Add0~7\ & VCC))
-- \U2|Add0~9\ = CARRY((\U2|r_pwm_val\(4) & !\U2|Add0~7\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U2|r_pwm_val\(4),
	datad => VCC,
	cin => \U2|Add0~7\,
	combout => \U2|Add0~8_combout\,
	cout => \U2|Add0~9\);

-- Location: FF_X2_Y25_N21
\U2|r_pwm_val[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \U1|r_div_clk~clkctrl_outclk\,
	d => \U2|Add0~8_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U2|r_pwm_val\(4));

-- Location: LCCOMB_X2_Y25_N22
\U2|Add0~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U2|Add0~10_combout\ = (\U2|r_pwm_val\(5) & (!\U2|Add0~9\)) # (!\U2|r_pwm_val\(5) & ((\U2|Add0~9\) # (GND)))
-- \U2|Add0~11\ = CARRY((!\U2|Add0~9\) # (!\U2|r_pwm_val\(5)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U2|r_pwm_val\(5),
	datad => VCC,
	cin => \U2|Add0~9\,
	combout => \U2|Add0~10_combout\,
	cout => \U2|Add0~11\);

-- Location: LCCOMB_X2_Y25_N6
\U2|r_pwm_val~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U2|r_pwm_val~1_combout\ = (\U2|Add0~10_combout\ & ((!\U2|Equal0~1_combout\) # (!\U2|Equal0~0_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \U2|Equal0~0_combout\,
	datac => \U2|Add0~10_combout\,
	datad => \U2|Equal0~1_combout\,
	combout => \U2|r_pwm_val~1_combout\);

-- Location: FF_X2_Y25_N7
\U2|r_pwm_val[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \U1|r_div_clk~clkctrl_outclk\,
	d => \U2|r_pwm_val~1_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U2|r_pwm_val\(5));

-- Location: LCCOMB_X2_Y25_N2
\U2|Equal0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U2|Equal0~0_combout\ = (\U2|r_pwm_val\(0) & (!\U2|r_pwm_val\(4) & (\U2|r_pwm_val\(6) & \U2|r_pwm_val\(5))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0010000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U2|r_pwm_val\(0),
	datab => \U2|r_pwm_val\(4),
	datac => \U2|r_pwm_val\(6),
	datad => \U2|r_pwm_val\(5),
	combout => \U2|Equal0~0_combout\);

-- Location: LCCOMB_X2_Y25_N28
\U2|r_pwm_val~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U2|r_pwm_val~2_combout\ = (\U2|Add0~4_combout\ & ((!\U2|Equal0~0_combout\) # (!\U2|Equal0~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \U2|Equal0~1_combout\,
	datac => \U2|Equal0~0_combout\,
	datad => \U2|Add0~4_combout\,
	combout => \U2|r_pwm_val~2_combout\);

-- Location: FF_X2_Y25_N29
\U2|r_pwm_val[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \U1|r_div_clk~clkctrl_outclk\,
	d => \U2|r_pwm_val~2_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U2|r_pwm_val\(2));

-- Location: LCCOMB_X2_Y25_N0
\U2|Equal0~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U2|Equal0~1_combout\ = (!\U2|r_pwm_val\(2) & (!\U2|r_pwm_val\(3) & \U2|r_pwm_val\(1)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0001000100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \U2|r_pwm_val\(2),
	datab => \U2|r_pwm_val\(3),
	datad => \U2|r_pwm_val\(1),
	combout => \U2|Equal0~1_combout\);

-- Location: LCCOMB_X2_Y25_N24
\U2|Add0~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U2|Add0~12_combout\ = \U2|r_pwm_val\(6) $ (!\U2|Add0~11\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001111000011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \U2|r_pwm_val\(6),
	cin => \U2|Add0~11\,
	combout => \U2|Add0~12_combout\);

-- Location: LCCOMB_X2_Y25_N4
\U2|r_pwm_val~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U2|r_pwm_val~0_combout\ = (\U2|Add0~12_combout\ & ((!\U2|Equal0~0_combout\) # (!\U2|Equal0~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \U2|Equal0~1_combout\,
	datac => \U2|Equal0~0_combout\,
	datad => \U2|Add0~12_combout\,
	combout => \U2|r_pwm_val~0_combout\);

-- Location: FF_X2_Y25_N5
\U2|r_pwm_val[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \U1|r_div_clk~clkctrl_outclk\,
	d => \U2|r_pwm_val~0_combout\,
	clrn => \i_sys_rst~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \U2|r_pwm_val\(6));

-- Location: IOIBUF_X0_Y22_N15
\i_compare_set_value[5]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_i_compare_set_value(5),
	o => \i_compare_set_value[5]~input_o\);

-- Location: IOIBUF_X0_Y27_N22
\i_compare_set_value[4]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_i_compare_set_value(4),
	o => \i_compare_set_value[4]~input_o\);

-- Location: IOIBUF_X0_Y23_N8
\i_compare_set_value[3]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_i_compare_set_value(3),
	o => \i_compare_set_value[3]~input_o\);

-- Location: IOIBUF_X0_Y25_N22
\i_compare_set_value[2]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_i_compare_set_value(2),
	o => \i_compare_set_value[2]~input_o\);

-- Location: IOIBUF_X0_Y27_N1
\i_compare_set_value[1]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_i_compare_set_value(1),
	o => \i_compare_set_value[1]~input_o\);

-- Location: IOIBUF_X0_Y24_N1
\i_compare_set_value[0]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_i_compare_set_value(0),
	o => \i_compare_set_value[0]~input_o\);

-- Location: LCCOMB_X1_Y25_N12
\U3|LessThan0~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U3|LessThan0~1_cout\ = CARRY((\i_compare_set_value[0]~input_o\ & !\U2|r_pwm_val\(0)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000100010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \i_compare_set_value[0]~input_o\,
	datab => \U2|r_pwm_val\(0),
	datad => VCC,
	cout => \U3|LessThan0~1_cout\);

-- Location: LCCOMB_X1_Y25_N14
\U3|LessThan0~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U3|LessThan0~3_cout\ = CARRY((\i_compare_set_value[1]~input_o\ & (\U2|r_pwm_val\(1) & !\U3|LessThan0~1_cout\)) # (!\i_compare_set_value[1]~input_o\ & ((\U2|r_pwm_val\(1)) # (!\U3|LessThan0~1_cout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \i_compare_set_value[1]~input_o\,
	datab => \U2|r_pwm_val\(1),
	datad => VCC,
	cin => \U3|LessThan0~1_cout\,
	cout => \U3|LessThan0~3_cout\);

-- Location: LCCOMB_X1_Y25_N16
\U3|LessThan0~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U3|LessThan0~5_cout\ = CARRY((\i_compare_set_value[2]~input_o\ & ((!\U3|LessThan0~3_cout\) # (!\U2|r_pwm_val\(2)))) # (!\i_compare_set_value[2]~input_o\ & (!\U2|r_pwm_val\(2) & !\U3|LessThan0~3_cout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \i_compare_set_value[2]~input_o\,
	datab => \U2|r_pwm_val\(2),
	datad => VCC,
	cin => \U3|LessThan0~3_cout\,
	cout => \U3|LessThan0~5_cout\);

-- Location: LCCOMB_X1_Y25_N18
\U3|LessThan0~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U3|LessThan0~7_cout\ = CARRY((\i_compare_set_value[3]~input_o\ & (\U2|r_pwm_val\(3) & !\U3|LessThan0~5_cout\)) # (!\i_compare_set_value[3]~input_o\ & ((\U2|r_pwm_val\(3)) # (!\U3|LessThan0~5_cout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \i_compare_set_value[3]~input_o\,
	datab => \U2|r_pwm_val\(3),
	datad => VCC,
	cin => \U3|LessThan0~5_cout\,
	cout => \U3|LessThan0~7_cout\);

-- Location: LCCOMB_X1_Y25_N20
\U3|LessThan0~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U3|LessThan0~9_cout\ = CARRY((\U2|r_pwm_val\(4) & (\i_compare_set_value[4]~input_o\ & !\U3|LessThan0~7_cout\)) # (!\U2|r_pwm_val\(4) & ((\i_compare_set_value[4]~input_o\) # (!\U3|LessThan0~7_cout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000001001101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U2|r_pwm_val\(4),
	datab => \i_compare_set_value[4]~input_o\,
	datad => VCC,
	cin => \U3|LessThan0~7_cout\,
	cout => \U3|LessThan0~9_cout\);

-- Location: LCCOMB_X1_Y25_N22
\U3|LessThan0~11\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U3|LessThan0~11_cout\ = CARRY((\U2|r_pwm_val\(5) & ((!\U3|LessThan0~9_cout\) # (!\i_compare_set_value[5]~input_o\))) # (!\U2|r_pwm_val\(5) & (!\i_compare_set_value[5]~input_o\ & !\U3|LessThan0~9_cout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000000101011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \U2|r_pwm_val\(5),
	datab => \i_compare_set_value[5]~input_o\,
	datad => VCC,
	cin => \U3|LessThan0~9_cout\,
	cout => \U3|LessThan0~11_cout\);

-- Location: LCCOMB_X1_Y25_N24
\U3|LessThan0~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \U3|LessThan0~12_combout\ = (\i_compare_set_value[6]~input_o\ & ((!\U2|r_pwm_val\(6)) # (!\U3|LessThan0~11_cout\))) # (!\i_compare_set_value[6]~input_o\ & (!\U3|LessThan0~11_cout\ & !\U2|r_pwm_val\(6)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000101010101111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \i_compare_set_value[6]~input_o\,
	datad => \U2|r_pwm_val\(6),
	cin => \U3|LessThan0~11_cout\,
	combout => \U3|LessThan0~12_combout\);

ww_o_compare_result <= \o_compare_result~output_o\;
END structure;


